Static noise margin(SNM) is the noise voltage injected in the SRAM cell which results in flipping the bit values in hold or read state or opposite bit is written during the write operation. The 6T SRAM cell schematic is given in figure 1.
Fig.1. 6T SRAM Cell
The pair of transistors M1 and M2 make one inverter. The other pair M3 and M4 make another inverter. These inverters are connected back to back forming a flipflop. It stores one bit of information. The nmos transistor M5 and M6 are referred as access transistors as they are used to access node Q and QB when either read or write operations are performed on SRAM cell.
In a typical SRAM cell, the cell ratio CR is between 1.5 and 2 and the Pullup ratio, PR is between 0.7 and 1. We can first size access transistor and load transistor as they are the smallest size. We will consider about 600nm width for nmos. This will be typical width considering that we have to provide for the metal contact to source and drain. Thus M5 and M6 transistors will have W5/L5 =W6/L6= W/L= 600nm/180nm. W/L is ratio of channel width to channel length of transistor. The load transistor M2 and M4 will have W2/L2=W4/L4= W/L = 600nm/180nm. Assume PR=1.0. The driver transistors M1 and M3 will have W1/L1=W3/L3= W/L= 1000nm/180nm. CR= ~1.67>1.5.
The SNM in hold state is measured by plotting the dc transfer characteristics of the two inverters constituting the SRAM cell. The SNM in hold state is also referred as read margin. The WL voltage is kept low, implying access transistors M5 and M6 are in off state. The circuit schematic is given in fig 2.
Fig.2.The Circuit schematic of SRAM Cell in LTSPICE
The simulation is performed in LTSPICE. The schematic used for simulation is shown in figure 3. Here WL , BL and BLB are kept at ground voltage. M5 and M6 can be disconnected from node Q and QB.
The DC transfer characteristics are obtained for both inverters as shown in Fig.4. The plot data is obtained from the LTSPICE simulation as text file and plotted in EXCEL sheet as shown in Fig .5. for determination of SNM. The two characteristics curves are overlapping.
Fig.5. The DC transfer characteristics of two inverters.
In order to obtain the SNM, The DC transfer characteristics of the second inverter is transposed i.e Vin2 is plotted as a function of Vout2. The resultant plot is shown in Fig.6. This is called butterfly plot. The SNM can be determined by fitting biggest square between the two curves. The side of the square in Volts gives the SNM. The average of the size of the side of the two squares in two lobes of the butterfly is obtained. The SNM for the figure shown is about 0.6 Volts.
Similar characteristics are obtain for determining SNM in read State and write state. In read state, the simulation is performed by keeping WL high and BL and BLB in precharged state. The SNM in read state is also referred as read margin. The LTspice schematic used for simulation is shown in fig.7.
Fig.7. The schematic used for simulation for determination of Read Margin
The DC transfer characteristics are obtained for both inverters as shown in Fig.8. The plot data is obtained from the LTSPICE simulation as text file and plotted in EXCEL sheet for determination of SNM as shown in Fig.9.
Fig.9. The DC transfer characteristics of two inverters(Read State).
In order to obtain the SNM, The DC transfer characteristics of the second inverter is transposed i.e Vin2 is plotted as a function of Vout2. The resultant plot is shown in Fig.10. This is called butterfly plot. The SNM can be determined by fitting biggest square between the two curves. The side of the square in Volts gives the SNM. The average of the size of the side of the two squares in two lobes of the butterfly is obtained. The SNM for the figure shown is about 0.3 Volts.
In write state, the simulation is performed by emulating the write conditions. We will determine the SNM assuming we want to write 0. Thus WL is kept high and BL is kept at 0 volt and BLB is at VDD. The SNM in write state is also referred as write margin. The LTspice schematic used for simulation is shown in fig.11. Similar characteristics are obtain for determining SNM in read State. However the simulation is performed by keeping WL high and BL and BLB in precharged state. The SNM in read state is also referred as read margin. The LTspice schematic used for simulation is shown in fig.7.
Fig.11. The schematic used for simulation for determination of Write Margin
The DC transfer characteristics are obtained for both inverters as shown in Fig.12. The plot data is obtained from the LTSpice simulation as text file and plotted in EXCEL sheet for determination of SNM as shown in Fig.13. In order to obtain the SNM, The DC transfer characteristics of the second inverter is transposed i.e Vin2 is plotted as a function of Vout2. For write margin, butterfly plot is not obtained. Here we are attempting to write zero and due to nose voltage we may write 1. The SNM can be determined by fitting smallest square between the two curves. The side of the square in Volts gives the SNM. The SNM for the figure shown is about 0.6 Volts.
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